This paper builds upon the type-II division algorithm proposed by Szabos and Tanaka, introducing significant enhancements to support efficient hardware implementation. https://www.researchgate.net/publication/389069067_Direct_Integer_Division_in_RNS_and_its_Hardware_Solutions
Maitrix SC22 Whitepaper – RNS TPU Maitrix releases a new whitepaper! Maitrix, LLC has recently revealed it has prototyped the world’s first non-binary Matrix Multiplier called RNS TPU. The RNS TPU is the world’s first matrix multiplier for AI training and scientific computing tasks that uses our carry-free modular computation. Maitrix will be showing its … Read more
A method for performing continuous error detection and correction of arithmetic is disclosed which utilizes a redundant residue number system (RRNS) and signed values encoded using the method of complements.
Here’s a whitepaper that discusses actual performance metrics of our modular computation and error correcting technologies.
Maitrix investor fact sheet
Building a Modular TPU Hybrid Super-Computer (ERICA) for under $10K www.digitalsystemresearch.com, May 2018
Design and Implementation of an Instruction Set Architecture and an Instruction Execution Unit for the Mod-9 Co-processor System University of Nevada-Las Vegas, Thesis, December, 2011
Proposal for a High Precision Tensor Processing Unit Publication description arxiv.org
Introduction of the Residue Number Arithmetic Logic Unit With Brief Computational Complexity Analysis Publication description arxiv.org
Continuous Error Detection and Correction of General Purpose Arithmetic in a Complement RRNS Researchgate preprint, April 2019
